← Resources · August 31, 2026
Economics GS 4 min read

Govt notifies Rs 1.27 lakh crore Semicon 2.0; outlines eligibility, sweeteners for full chip ecosystem

What happened
01

The Ministry of Electronics and Information Technology (MeitY) formally notified "Semicon 2.0," an expanded semiconductor incentive scheme with a total outlay of Rs 1.27 lakh crore.

02

The scheme widens support beyond chip fabrication (fabs) to cover the full value chain: chip design, equipment and materials, advanced packaging (ATMP/OSAT), compound/display/micro-LED fabs, and R&D/talent development, organised across six pillars and ten eligibility categories.

03

Silicon wafer fabs will now receive 40% fiscal support on capital expenditure, down from the 50% support offered under the first phase of the India Semiconductor Mission; eligibility requires a minimum investment of Rs 20,000 crore and prior-year revenue benchmarks.

04

Smaller fab categories (compound semiconductors, photonics, sensors, display, micro-LED) get 35% capex support, while equipment/materials manufacturing gets 30% capex support plus a production-linked incentive; packaging units get 25–35% support depending on whether they use advanced or legacy processes.

05

Startups and MSMEs engaged in chip design can access seed funding of up to Rs 15 crore or 50% of project cost, alongside a deployment-linked reimbursement of net sales for successfully commercialised designs.

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India Semiconductor Mission (ISM)

The India Semiconductor Mission is a specialised, independent business division housed within the Digital India Corporation, established in December 2021 as part of a Rs 76,000 crore package to build a sustainable semiconductor and display ecosystem. It functions as the nodal agency for implementing schemes to attract investment in chip fabrication, design, and packaging, and drives coordination between the Centre, states, and industry. ISM's original scheme offered up to 50% fiscal support for semiconductor fabs; Semicon 2.0 recalibrates several of these support levels while extending coverage across the value chain.

Connection to this news

Semicon 2.0 is the second-generation policy instrument under the India Semiconductor Mission umbrella, replacing/supplementing the original scheme's fab-centric approach with a full ecosystem strategy covering ten distinct categories.

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Production-Linked Incentive (PLI) and Fiscal Support Schemes

PLI-type schemes offer direct financial incentives to manufacturers based on incremental output, investment, or sales, aimed at building domestic manufacturing scale in strategic sectors and reducing import dependence. Unlike classic PLI (which pays a percentage of incremental sales), semiconductor equipment/materials support under Semicon 2.0 combines upfront capex reimbursement (30%) with a smaller production-linked incentive (2–10%), reflecting the extremely high capital intensity of chip manufacturing compared to sectors like electronics assembly or pharmaceuticals.

Key Details

  • PLI schemes exist across ~14 sectors since 2020 (mobile manufacturing, pharma, textiles, specialty steel, etc.)
  • Semiconductor fabrication support is structured as capex-linked fiscal support rather than pure output-linked PLI, given multi-year gestation before revenue begins
  • Chip design incentives include a novel "deployment incentive" of 9% reimbursement on net sales for five years, capped at Rs 30 crore per application
Connection to this news

Semicon 2.0 illustrates how India customises its incentive architecture — heavier upfront capex support for capital-intensive fabs, output-linked incentives for design/equipment where revenue realisation is faster.

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Strategic Importance of Semiconductors (Critical and Emerging Technologies)

Semiconductors are foundational components for electronics, telecom, defence, automotive, and AI hardware; global supply is concentrated in a handful of countries (Taiwan, South Korea, USA, and increasingly China), making chip self-reliance a matter of both economic and national security policy. India's push to build fabrication, packaging, and design capability domestically is part of a broader "China+1" and supply-chain diversification trend among Quad and like-minded economies following pandemic-era chip shortages.

Key Details

  • Fabless design (India's traditional strength via companies designing chips manufactured elsewhere) is now paired with actual fabrication incentives
  • India currently imports/assembles most advanced chips; Semicon 2.0 aims to localise fabrication, packaging (OSAT/ATMP), and materials/equipment supply
  • Compound semiconductors (e.g., gallium nitride, silicon carbide) are increasingly relevant for power electronics, EVs, and 5G/6G — hence a dedicated support category
Connection to this news

By extending incentives to compound semiconductors, display fabs, and micro-LEDs (not just silicon), Semicon 2.0 positions India for next-generation electronics and EV-linked power semiconductor demand, not only legacy chip manufacturing.

Key facts & data
  • Total Semicon 2.0 outlay: Rs 1.27 lakh crore, notified by MeitY on 31 August 2026.
  • Silicon wafer fab fiscal support: 40% of capex (down from 50% under the original ISM scheme); minimum investment Rs 20,000 crore; minimum revenue Rs 7,500 crore in any three preceding years; minimum capacity 40,000 wafer starts per month (300-mm wafers).
  • Compound semiconductor/photonics/sensor/discrete fabs: 35% support, minimum investment Rs 500 crore; Display (OLED/LCD) fabs: 35% support, minimum investment Rs 10,000 crore; Micro-LED fabs: 35% support, minimum investment Rs 1,500 crore.
  • Packaging (ATMP/OSAT): 35% support for advanced packaging, 25% for legacy packaging; minimum investment Rs 1,000 crore.
  • Startup/MSME chip-design seed funding: up to Rs 15 crore or 50% of project cost; deployment incentive of 9% reimbursement on net sales for five years, capped at Rs 30 crore per application; R&D and talent development support up to 75% of project cost.
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