Cabinet approves₹1.27 lakh crore for Semicon Mission 2.0
The Union Cabinet approved the second edition of the India Semiconductor Mission (ISM 2.0) with a budgetary outlay of ₹1.27 lakh crore
The approval was announced alongside a wider package of manufacturing and infrastructure measures
The mission is structured around six pillars: chip design, supply chain for critical inputs, manufacturing (fabs), packaging (ATMP/OSAT), research and development, and talent development
The government expects the scheme to draw investments of around ₹4 lakh crore and generate semiconductor production worth around ₹2 lakh crore over the scheme period
The approval builds on the first India Semiconductor Mission (ISM 1.0), under which 12 projects with cumulative committed investment of around ₹1.64 lakh crore have already been approved
India Semiconductor Mission (ISM) — Origin and Institutional Structure
The India Semiconductor Mission was approved by the Union Cabinet in December 2021 with an outlay of ₹76,000 crore under the "Semicon India Programme," administered by the Ministry of Electronics and Information Technology (MeitY). ISM was set up as an independent business division within Digital India Corporation, with administrative and financial autonomy, to formulate and drive India's long-term strategy for semiconductor and display manufacturing.
Key Details
- Approved: December 2021; outlay: ₹76,000 crore; nodal ministry: MeitY
- Structured as a business division of Digital India Corporation (not a standalone statutory body)
- Acts as nodal agency for appraising and administering all schemes under the Semicon India Programme (fabs, display fabs, compound semiconductor/ATMP-OSAT units, and chip design)
ISM 2.0 nearly doubles the original outlay and formalises the mission into six defined pillars, extending the 2021 framework from primarily fab-and-packaging incentives to a fuller value chain covering design, supply chain, and talent.
Semiconductor Value Chain — Fab, Fabless Design, and ATMP/OSAT
The semiconductor industry is organised around three broad business models: Integrated Device Manufacturers (IDMs) that both design and fabricate chips; "fabless" companies that only design chips and outsource fabrication to a "foundry"; and Outsourced Semiconductor Assembly and Test (OSAT) or Assembly, Testing, Marking and Packaging (ATMP) units that perform the back-end packaging and testing of fabricated chips. India, prior to ISM 1.0, had no commercial semiconductor fab and relied entirely on ATMP/OSAT and design activity.
Key Details
- Fab (foundry): front-end wafer fabrication — capital-intensive, most technologically complex stage
- ATMP/OSAT: back-end packaging, testing, and marking of fabricated chips — India's traditional area of activity
- Fabless design: chip design without owning fabrication capacity; India has a large fabless design workforce but historically limited domestic fab capacity
ISM 2.0's "manufacturing" and "packaging" pillars are aimed at moving India up the value chain from ATMP/OSAT-only capability toward silicon fabs, compound semiconductor fabs, and display fabs.
Fiscal Support Structure Under the Semicon India Programme
Unlike Production Linked Incentive (PLI) schemes, which pay incentives as a percentage of incremental sales, the Semicon India Programme extends direct fiscal (capital) support tied to project cost. This distinguishes ISM as a capital-support/mission-mode scheme rather than a production-linked one.
Key Details
- Semiconductor fabs and display fabs: fiscal support of up to 50% of project cost on a pari-passu basis
- Compound semiconductor/silicon photonics/sensor (MEMS) fabs and ATMP/OSAT units: fiscal support of 50% of capital expenditure
- Design Linked Incentive (DLI) scheme: "Product Design Linked Incentive" of up to 50% of eligible expenditure (capped at ₹15 crore per application) plus a "Deployment Linked Incentive" of 4-6% of net sales turnover over 5 years (capped at ₹30 crore per application)
ISM 2.0's chip-design pillar builds directly on the existing DLI framework, while its manufacturing and packaging pillars extend the 50%-of-project-cost fiscal support model to a larger pool of fab and ATMP/OSAT proposals.
- ISM 2.0 outlay: ₹1.27 lakh crore
- ISM 1.0 outlay (Dec 2021): ₹76,000 crore
- ISM 1.0 projects approved so far: 12, with cumulative investment of ~₹1.64 lakh crore
- Expected investment under ISM 2.0: ~₹4 lakh crore; expected production value: ~₹2 lakh crore
- ISM 2.0 six pillars: chip design, supply chain, manufacturing, packaging, R&D, talent development
- Nodal ministry: Ministry of Electronics and Information Technology (MeitY); implementing body: India Semiconductor Mission (a division of Digital India Corporation)
- Fiscal support under Semicon India Programme: up to 50% of project cost for fabs; DLI design incentive capped at ₹15 crore per application