Global firms are now trusting India for their most advanced semiconductor work: Minister Ashwini Vaishnaw
Union Minister for Electronics and IT Ashwini Vaishnaw stated that global firms now trust India for their most advanced semiconductor work, moving beyond back-office support to frontier-level design and engineering.
India's design capabilities have reached a stage where companies undertake end-to-end chip design in the country — from product definition to silicon validation.
The Minister inaugurated facilities by Texas Instruments (new R&D centre) and Zetwerk Electronics (advanced manufacturing for aerospace, defence, and automotive electronics) in Bengaluru during the same visit.
Vaishnaw outlined India Semiconductor Mission 2.0 (ISM 2.0) priorities: chip design, equipment supply chain development, and talent building for the "fifth industrial revolution."
India Semiconductor Mission (ISM) — Phase 1 and 2.0
India Semiconductor Mission was launched in December 2021 under the Ministry of Electronics and Information Technology to build a complete semiconductor ecosystem covering chip design, fabrication, packaging, materials, and equipment. ISM 2.0 was announced in the Union Budget 2026-27, marking a shift from ecosystem creation to ecosystem consolidation and global integration.
Key Details
- ISM is supported by a total incentive framework of Rs 76,000 crore, offering fiscal support of up to 50% for silicon fabs, compound semiconductor facilities, assembly and testing units, and chip design
- ISM 2.0 has a provision of Rs 1,000 crore for FY 2026-27, with emphasis on industry-led research and training centres
- As of December 2025, 10 projects with total investment of Rs 1.60 lakh crore have been approved across 6 states — including silicon fabrication units, silicon carbide fabs, advanced memory packaging facilities, and assembly and testing infrastructure
- ISM's Design-Linked Incentive (DLI) scheme currently supports 24 semiconductor design startups, which have attracted nearly Rs 430 crore in venture capital funding
- By 2029, India is expected to design and manufacture chips for 70-75% of domestic applications
Vaishnaw's assertion that global firms now entrust India with their most advanced design work validates ISM's strategy of positioning India as a chip design hub, with ISM 2.0 further prioritising design, equipment, and talent over mere fabrication.
India's Semiconductor Design Workforce
India accounts for approximately 20% of the global semiconductor design workforce, with over 1 lakh VLSI design engineers working in both multinational and domestic design companies. This talent base, concentrated in Bengaluru, Hyderabad, Chennai, and Pune, forms the backbone of India's semiconductor ecosystem.
Key Details
- Texas Instruments opened India's first semiconductor R&D centre in 1985; Intel followed in 1988, developing one of its largest design facilities outside the US
- Of the 10 lakh semiconductor jobs projected by FY 2026-27, approximately 3 lakh will be in fabrication and 2 lakh in Assembly, Testing, Marking, and Packaging (ATMP)
- The government is developing 85,000 skilled professionals in semiconductor design over 10 years and providing Electronic Design Automation (EDA) tools to institutions
- Over 45,000 students from 100 institutions are enrolled in semiconductor training programmes so far
- Major multinationals operating design centres in India include Intel, AMD, Nvidia, Texas Instruments, Samsung Semiconductor, Qualcomm, and Applied Materials
The Minister's claim that global firms trust India for "most advanced" work rests on this four-decade-old talent ecosystem, which now enables end-to-end chip design domestically rather than fragmented support roles.
Semiconductor Value Chain — Design vs Fabrication
The global semiconductor industry operates on a design-fabrication split model. "Fabless" companies design chips but outsource manufacturing to dedicated foundries (e.g., TSMC, Samsung Foundry, GlobalFoundries). Design encompasses architecture definition, RTL coding, physical design, verification, and tape-out — the final stage where design files are sent to the foundry for mask creation and fabrication.
Key Details
- Tape-out is the critical milestone marking the end of the design phase and beginning of the manufacturing process; the term originates from the historical practice of sending design data on magnetic tape to fabs
- The design file format is GDSII (Graphic Data System), which contains geometric descriptions of every layer of the chip
- The fabless model allows countries to participate in the semiconductor value chain without building multi-billion-dollar fabrication plants
- India's strength lies in the design segment; fabrication is being developed through ISM-approved fab projects by Tata Electronics, CG Power, and Micron (packaging)
When Vaishnaw says India handles "end-to-end" chip work from "product definition to silicon validation," he refers to the full design cycle culminating in tape-out — positioning India as a complete design destination within the fabless model.
- India represents ~20% of the global semiconductor design workforce
- ISM incentive framework: Rs 76,000 crore (up to 50% fiscal support)
- ISM 2.0 allocation for FY 2026-27: Rs 1,000 crore
- 10 projects approved under ISM with Rs 1.60 lakh crore total investment across 6 states
- 24 design startups supported under DLI scheme; Rs 430 crore in VC funding raised
- Target: India to design and manufacture chips for 70-75% of domestic applications by 2029
- 85,000 skilled semiconductor design professionals being developed over 10 years
- 45,000+ students enrolled from 100 institutions in semiconductor training