Promise of chips: On the India Semiconductor Mission phase II
The Union Cabinet has approved the second phase of the India Semiconductor Mission (Semicon 2.0 / ISM 2.0), succeeding the original 2021 mission, with a significantly expanded outlay to widen India's semiconductor fabrication, packaging, and design ecosystem.
Under the new phase, chip design activity is to be supported through a mix of grants and equity investment, while equipment, chemicals, gases, and materials manufacturing for the sector will receive a flat incentive rate.
The mission's operating lifecycle has been extended from the original five-year window to twelve years, intended to give long-term institutional investors greater confidence to commit capital to inherently capital-intensive fabrication and packaging projects.
The scheme continues to be administered by the Ministry of Electronics and Information Technology (MeitY), building on projects already approved and, in some cases, already in commercial production under the first phase.
The Design Linked Incentive (DLI) Scheme and India's Chip-Design Ecosystem
While fabrication (building the physical chip) captures most public attention, chip design — the intellectual-property-intensive process of creating the circuit architecture before it is manufactured — is a distinct, less capital-intensive segment where India already has a strong talent base. The Design Linked Incentive (DLI) Scheme, launched alongside the original India Semiconductor Mission in 2021 with a Rs 1,000 crore outlay, was designed specifically to help Indian semiconductor design start-ups and MSMEs move from idea to a fabrication-ready, volume-production chip.
Key Details
- DLI has three components: Chip Design Infrastructure Support (access to an EDA tool grid and IP core repository via C-DAC's India Chip Centre, plus support for multi-project wafer fabrication), the Product Design Linked Incentive (reimbursing up to 50% of eligible project expenditure, capped per project), and the Deployment Linked Incentive (a 4–6% incentive on net sales over five years for chips that reach the market)
- DLI runs over a 5-year window per approved design project and is nodal-administered by MeitY through the India Semiconductor Mission
- Semicon 2.0 continues and expands support for the design segment through a mix of grants and equity investment for strategic and commercial chip design, building on the DLI framework rather than replacing it
By continuing to fund design work (not just fabs) with grants and equity, Semicon 2.0 signals that India's chip strategy is not solely about attracting foreign fabrication plants but also about building a domestic, IP-owning design industry — the segment where India's existing software/engineering talent base offers a comparative advantage.
India's Chip Push in the Global Semiconductor Subsidy Race
India's semiconductor incentive programme is part of a broader global wave of state intervention in chip manufacturing, triggered by supply-chain vulnerabilities exposed during the COVID-19 pandemic and geopolitical concentration risk (most advanced fabrication capacity sits with a handful of firms, chiefly in Taiwan). Major economies have responded with their own large public subsidy programmes: the United States enacted the CHIPS and Science Act in 2022, and the European Union enacted its own Chips Act in 2023.
Key Details
- The US CHIPS and Science Act (2022) allocated about $52.7 billion for semiconductor manufacturing, research, and workforce development, plus roughly $24 billion in investment tax credits; it also restricts CHIPS-funded firms from expanding advanced fabrication in "countries of concern" for 10 years
- The EU Chips Act (in force since September 2023) aims to mobilise about €43 billion in public and private investment by 2030, targeting a doubling of the EU's global chip market share from around 10% to 20%
- India's Semicon 2.0 outlay of roughly Rs 1.27 lakh crore (about $13–15 billion) is smaller in absolute dollar terms than the US or EU programmes but represents a similarly structured attempt — combining capital subsidies for fabs/ATMP with design and equipment incentives — to build sovereign capacity in a strategically concentrated global industry
- India's total semiconductor ecosystem investment target under the ISM framework (Phase I plus Phase II) is around Rs 4 lakh crore, aiming for roughly Rs 2 lakh crore in domestic semiconductor production and Rs 1 lakh crore in exports
Positioning Semicon 2.0 alongside the US and EU chip acts frames India's mission as part of a global trend of "friend-shoring" and de-risking semiconductor supply chains away from concentrated production hubs — a comparative angle UPSC often tests under India's industrial policy and global economic geography themes.
Extending the Mission Lifecycle — Patient Capital for Capital-Intensive Industry
A distinguishing design choice in Semicon 2.0 is stretching the scheme's operative period from five to twelve years. Semiconductor fabrication is exceptionally capital-intensive and slow to generate returns — a single fab can cost billions of dollars and take several years from approval to commercial output — so a short subsidy window can deter long-horizon institutional investors (sovereign wealth funds, pension funds) who need policy certainty across a fab's full investment-and-payback cycle.
Key Details
- The original India Semiconductor Mission (approved by the Union Cabinet on 15 December 2021) carried an outlay of Rs 76,000 crore under a shorter operative horizon; of the projects approved under it, several have already moved from approval to construction and, in a few cases, into commercial production
- Semicon 2.0's 12-year lifecycle is intended to provide sustained fiscal support across the full gestation period of silicon fabs, compound semiconductor units, and assembly/testing facilities, rather than requiring re-approval or fresh policy commitment mid-project
- This mirrors a broader industrial-policy principle also seen in other long-gestation capital schemes (e.g., production-linked incentive schemes with multi-year disbursement windows) where policy stability, not just subsidy size, is treated as a determinant of investor confidence
The lifecycle extension is a direct policy response to industry feedback that fabrication investment decisions are made on a much longer horizon than a typical five-year scheme window, reinforcing that sustained, predictable state support — not just headline subsidy amounts — is central to building a domestic fabrication base.
- India Semiconductor Mission 2.0 (Semicon 2.0): approved by the Union Cabinet, outlay of approximately Rs 1.27 lakh crore; nodal ministry MeitY
- Original India Semiconductor Mission: approved 15 December 2021, outlay Rs 76,000 crore
- Mission lifecycle extended from 5 years to 12 years under Phase II
- Equipment/chemicals/gases/materials manufacturing incentive under Semicon 2.0: flat 30%
- Design Linked Incentive (DLI) Scheme: Rs 1,000 crore outlay, three components (Design Infrastructure Support, Product DLI up to 50% reimbursement, Deployment DLI of 4–6% of net sales)
- US CHIPS and Science Act (2022): approximately $52.7 billion in direct funding plus ~$24 billion in tax credits
- EU Chips Act (2023): targets mobilising approximately €43 billion in investment by 2030, aiming to double EU chip market share from ~10% to 20%
- Total projected investment under India's semiconductor mission framework (Phase I + II): around Rs 4 lakh crore